Package: covered-doc (0.7.7-1) [universe]
Links for covered-doc
Download Source Package covered:
Original Maintainers (usually from Debian):
- Debian Electronics Team (Mail Archive)
- أحمد المحمودي (Ahmed El-Mahmoudy)
It should generally not be necessary for users to contact the original maintainer.
- Homepage [covered.sourceforge.net]
Verilog code coverage analysis tool - documentation
Covered is a Verilog code coverage utility that reads in a Verilog design and a generated VCD/LXT dumpfile from that design and generates a coverage file that can be merged with other coverage files or used to create a coverage report. Covered also contains the GUI coverage report utility that reads in a coverage file to allow interactive coverage discovery. Areas of coverage measured by Covered are: line, toggle, memory, combinational logic, FSM state/state-transition and assertion coverage.
This package contains the documentation.